Wafer level manufacturing processes are employed for example in manufacturing integrated circuits, image sensors, micro lens arrays, etc. Such parallel wafer level manufacturing uses a limited number of process steps to simultaneously obtain thousands of such devices, reducing their manufacturing cost. However, the fabrication and assembly of arrayed wafer level manufactured LCL devices remain as some of the most challenging process steps. Tailored approaches must be developed for each specific manufacturing process.
Electrically controllable (tunable), gradient index, liquid crystal lenses (TLCL's) are known in the art. As an example, see Applicant's international PCT patent application publication WO2009/153764 dated Dec. 23, 2009. Wafer-scale manufacturing of such TLCL's is known from Applicant's international PCT patent application publication WO2010/075627 dated Jul. 8, 2010.
Contamination of the liquid crystal material by resin material used to form reservoir walls is a problem during manufacturing. In the mentioned WO2010/075627, this problem is mitigated by the use of a pre-cured inner reservoir wall and an outer wall that is less cured, so as to allow for a good bond between substrates, while reducing the risk of liquid crystal contamination.